1. Field of the Invention
This invention has as its object a active matrix display screen without spurious transistor.
2. Discussion of Background
An active matrix display screen generally comprises two plates between which is inserted an electrooptical material such as a liquid crystal. On one of the plates is a matrix of transparent conductive blocks, thin-film transistors, a family of conductive addressing lines and a family of conductive addressing columns. Each transistor has a gate connected to a line, a source connected to a block and a drain connected to a column. On the second plate is a counterelectrode.
Such a structure is shown in FIG. 1. Represented there in a simplified manner is a lower plate 10 carrying conductive columns 12 and conductive lines 14, transistors 20 and conductive blocks 22, and an upper plate 24 covered with a counterelectrode 26.
To obtain such a structure, a process can be used whose main stages are illustrated in FIG. 2. This process comprises the following operations:
preparation of a glass substrate 30 by physicochemical cleaning, PA1 depositing of a layer 32 of transparent conductive material, for example of indium and tin oxide (ITO) (part a), PA1 a first photoengraving, to give layer 32 the shape of columns 34 and of blocks 36 provided with a rectangular appendix 38 (part b), PA1 depositing of a hydrogenated amorphous silicon layer 40, a silica layer 42 and an aluminum layer 44, each depositing being made at abaout 250.degree. C. (or more if the CVD-plasma technique is used (part c), PA1 a second photoengraving, to define lines 46 overlapping appendices 38 and intersecting the columns, which defines the transistors (part d), PA1 general passivation by depositing of a SiO.sub.2 layer (not shown).
Such a process, with two masking levels, is described in French patent application FR-A-2 533 072.
Despite its simplicity, this process exhibits a drawback which is the following.
By leaving present, for each line, the metal-insulation-(a-Si:H) stack, a spurious transistor is created between each pixel and the column located on the right. Now, a pixel should receive viedeo information only from the column located on its left, and not from the column located on its right. With a spurious transistor, this condition will not be met and a pixel will be able to receive a video information coming from the column located on its right. But, as noted in the patent cited above, the current passing through the spurious transistor is much weaker than the one which passes through the main transistor, when the lengths of the channels of the transistors are very different. Actually, the current flowing in a transistor is inversely proportional to the length of its channel. When these channels have for length 10 microns for the main transistor and 200 microns for the spurious transistor, respectively, the stray current represents only 5% of the main current when the voltages on the two adjacent columns are equal.
However, the presence of the spurious transistor cannot be ignored in the case of display screens with a very slight step and especially in the case of screens intended for the display of alphagraphic characters in which the borders between the black zones and the white zones are very abrupt and frequent. Actually, in this case, opposite information can be found from one pixel to another and it is then necessary to compare the stray current coming from the right column to a zero (or very small) current coming from the left column. The stray current can then no longer be negligible in comparison with the main current.
In this case, the spurious voltage induced in the pixel should remain lower than the threshold voltage of the liquid crystal.
Here, therefore, a first difficulty is encountered.
A second difficulty relates to the transient states.
A stray capacitance (Cp) exists between a line and a pixel. At the rising and falling edges of the signal applied to a line, this capacitance causes a spurious voltage .DELTA.Vp to appear at the terminals of the liquid crystal: ##EQU1## where C.sub.LC designates the capacitance of the pixel and Vg the amplitude of the control pulse. The spurious pulse corresponding to the rising edge is not bothersome because the final voltage at the terminals will, in any case, be the video voltage imposed by the conducting transistor. On the other hand, at the falling edge, the transistor is blocked and the spurious charges can no longer flow into the transistor; therefore, a spurious negative voltage appears. Actually, in addition to the geometric capacitance corresponding to the gate-source overlap, it is necessary to take into acount the reserve of electrons constituted by the spurious channel (to the right of the pixel) which, during the passage to the blocking state, will flow toward the pixel and create a considerable flow of electrons.
To avoid this spurious transistor, additional engravings of the insulation-(a-Si:H) stack can always be performed to eliminate the spurious channel, while keeping a conductive line. But this would complicate the process of making the device by increasing the number of engravings.